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The Mendocino Celeron CPU came only designed for a 66 MHz front-side bus, but this would not be a serious performance bottleneck until clock rates reached higher levels.

The Mendocino Celerons also introduced new packaging.

Some motherboards were designed to prevent this modification, by restricting the Celeron's front side bus to 66 MHz.

However, overclockers soon found that putting tape over pin B21 of the Celeron's interface slot circumvented this, allowing a 100 MHz bus.

Indeed, most industry analysts regarded the first Mendocino-based Celerons as too successful—performance was sufficiently high to not only compete strongly with rival parts, but also to attract buyers away from Intel's high-profit flagship, the Pentium II.

Intel's existing low-end product, the Pentium MMX, was no longer performance competitive at 233 MHz.Celeron is a brand name given by Intel to a number of different low-end IA-32 and x86-64 computer microprocessor models targeted at low-cost personal computers.Celeron processors are compatible with IA-32 computer programs, but their performance is typically significantly lower when compared to similar CPUs with higher-priced Intel CPU brands.The Mendocino Celeron, launched August 24, 1998, was the first retail CPU to use on-die L2 cache.Whereas Covington had no secondary cache at all, Mendocino included 128 KB of L2 cache running at full clock rate.

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